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Diffstat (limited to 'src/ARMInterpreter_LoadStore.cpp')
-rw-r--r--src/ARMInterpreter_LoadStore.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/ARMInterpreter_LoadStore.cpp b/src/ARMInterpreter_LoadStore.cpp
index 6d43b62..1c81900 100644
--- a/src/ARMInterpreter_LoadStore.cpp
+++ b/src/ARMInterpreter_LoadStore.cpp
@@ -410,7 +410,7 @@ void A_LDM(ARM* cpu)
}
if ((cpu->CurInstr & (1<<22)) && !(cpu->CurInstr & (1<<15)))
- cpu->UpdateMode(cpu->CPSR, (cpu->CPSR&~0x1F)|0x10);
+ cpu->UpdateMode(cpu->CPSR, (cpu->CPSR&~0x1F)|0x10, true);
for (int i = 0; i < 15; i++)
{
@@ -439,7 +439,7 @@ void A_LDM(ARM* cpu)
}
if ((cpu->CurInstr & (1<<22)) && !(cpu->CurInstr & (1<<15)))
- cpu->UpdateMode((cpu->CPSR&~0x1F)|0x10, cpu->CPSR);
+ cpu->UpdateMode((cpu->CPSR&~0x1F)|0x10, cpu->CPSR, true);
if (cpu->CurInstr & (1<<21))
{
@@ -494,7 +494,7 @@ void A_STM(ARM* cpu)
else if (mode != 0x10 && mode != 0x1F)
isbanked = (baseid >= 13 && baseid < 15);
- cpu->UpdateMode(cpu->CPSR, (cpu->CPSR&~0x1F)|0x10);
+ cpu->UpdateMode(cpu->CPSR, (cpu->CPSR&~0x1F)|0x10, true);
}
for (u32 i = 0; i < 16; i++)
@@ -520,7 +520,7 @@ void A_STM(ARM* cpu)
}
if (cpu->CurInstr & (1<<22))
- cpu->UpdateMode((cpu->CPSR&~0x1F)|0x10, cpu->CPSR);
+ cpu->UpdateMode((cpu->CPSR&~0x1F)|0x10, cpu->CPSR, true);
if ((cpu->CurInstr & (1<<23)) && (cpu->CurInstr & (1<<21)))
cpu->R[baseid] = base;